Process Node Considerations in The Development Of High-Performance Data Converters
Moving between analog design and digital domains require data converters, but sometimes they present both challenges and opportunities.
When it comes to sensors and actuators, the use of data converters is necessary. Moreover, they are used in many other places, including RF signals for wireless communications, on-chip from PVT monitors, embedded in the SerDes for wireline communications, and those in voltage domains.
Challenges for Data Converters
There are increasing challenges in the arrival of newer technologies. However, emerging applications, including autonomous driving array of sensors, may require reconsidering some established practices.
At the same time, data converters and analog ASIC can be considered in artificial intelligence instead of the power-hungry digital multiply/ accumulate functions.
How Data Converters are Designed
Data converters are designed and built for very exacting demands just like other basic components. So, the amount of accuracy needed for the power you can tolerate will determine what your system is capable of.
However, the biggest challenge for analog to digital converters used in wireless communication is when you need to get an analog signal into the transceiver. Such has been considered one of the challenges for 5G or the ecosystem around the automotive industry.
Smaller Technology Nodes
Analog to digital converters can be found all around the world. But the industry is seeing a push for higher performance, lower power solutions. This needs to be implemented in smaller technology nodes.
Take note that smaller technology nodes can cater to digital blocks to make it work faster while keeping or increasing their performance.
Pushing the Technology Limit
A lot of analog design are still adapted by many designers. But the decreasing size of the process nodes can pose a problem for analog designers.
However, there are converter technologies to address this issue, since analog designers are creative. This can be remedied using a digital-assisted calibration.
So, it requires a low-performance analog block design instead of trying to push analog performance beyond the technological limits. As a result, it can improve the efficiency and allow the reuse of old architectures previously limited to low-performance applications.
Such process nodes will enable lots of digital processing in a small area. However, it will require to run more simulations.
Pushing the Speed Limit
Getting data on and off chip is the function of many analog contents. This can be done via PCI express PHY with a decision feedback equalizer and auto-calibration. But they can be fast enough that it will get difficult to move the data from one location through the medium.
This can be through the FR4, absorbing the signal at high frequency, which is much faster than low-frequency signals.
Data converter technology is evolving rapidly. Since the demands are changing quite rapidly, the use of newer process nodes has added complications. So, any increase in the accuracy obtainable can be used to improve the overall chip performance and power profiles.
Therefore, to obtain the accuracy levels, calibration is essential. Nowadays, automotive analog design is pushing these circuits to undergo self-test, which is something to look forward to.
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