Archive for category: System-On-A-Chip and ASIC Design Blog

A study was able to determine how mixed signal ASIC was able to accelerate diverse machine-learning (ML) algorithms.

Knowing machine-learning algorithms

Basically, machine-learning algorithms process huge datasets rapidly, giving helpful insights to a particular outcome. Nowadays, there are many emerging applications that has increasing dependencies on the ability to extract patterns from huge data sets in support to inference and decision-making with ML algorithms.

Thousands of data sources are analyzed simultaneously using machine learning algorithms. This makes it impossible for human traders to achieve. That is because machine learning algorithms can help them squeeze a slim advantage over the market average.

ML algorithms offer higher performance in comparison to humans particularly in cognitive and decision-making tasks. However, more computing capability is needed due to the complex computation in processing larger amounts of data.

Meeting challenging demands

The challenges in meeting the computational demands of general purpose processors, the use of specialized processors has been applied. As a result, such ML accelerators will be able to deliver orders of magnitude higher energy efficiency more than general purpose processors can provide.

However, the use of analog or mixed signal accelerators can be useful for improving the energy efficiency of machine learning accelerators. Comparing these to traditional large-signal computations in the digital domain, these are much more energy-efficient.

But still, such accelerators lack the programmable architecture, compiler support, or instruction sets to support architecture software. These are important in supporting high-level programming languages like Julia or Python.

In addition, there are tradeoffs in energy versus accuracy due to the algorithmic error tolerance in allowing hardware-level small-signal computations. with this case, there must be a control at the application level to meet the application domain accuracy or precision goals.

In such a case, there is a need for careful hardware, instruction set architecture, and compiler design.

Designing programmable mixed-signal accelerators

The use of programmable mixed signal accelerator can address the challenges in the previous applications. This can help diverse ML algorithms to accomplish a high level of programmability without affecting mixed-signal accelerator efficiency for specific machine-learning algorithms.

Basically, mixed signal ASIC uses both analog and digital circuits on a single semiconductor die. This is most common in smart mobile phones as mixed signal designs are everywhere.

Advantages of using mixed signal ASIC

• Exposes instruction set mechanisms to allow software to control over the said tradeoffs in energy vs. accuracy
• Supports the compilation of high-level languages
• Offers an alternative line of integration through the use of computer memory
• Energy benefits through optimal swing values gained through compiler directed energy optimization

Conclusion

Overall, the utilization of the first end-to-end design of mixed signal ASIC will accomplish high-level programmability. This aims to do it without compromising the efficiency of mixed signal accelerators for particular machine learning algorithms.

The development of a new technology has enabled software control over tradeoffs in energy versus accuracy. It also supports the compilation of high-level languages down to the hardware. Thus, it has better energy efficiency compared to digital ASICs even with much greater programmability.

This also shows significant energy savings resulting from tolerable small programmer-specified errors.

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Are you familiar with system-on-a-chip (SoC)? If not, well, you should because it is one of the components found inside your beloved smartphone.

In fact, it is an especially important component of your smartphone that makes it function, comparable to a human brain. But perhaps it is more appropriate to compare it to the motherboard of a personal computer (PC).

The system-on-a-chip in brief

Motherboard on a PC are composed of a central processing unit (CPU), graphical processing unit (GPU), and a random-access memory (RAM). While these components reside as separate units on a PC, the system-on-a-chip on a smartphone combines all components into a single integrated circuit.

During the consolidation of parts, software components and hardware components will be combined. The combination of hardware and software components allows the reduction of power consumption and increases its performance overall.

To keep different elements in a confined area

It should be a daunting task to imagine all the different elements to coexist in a single confined area. Therefore, manufacturers take advantage of the ARM architecture in which its processors use the RISC-based design.

RISC stands for reduced instruction set computer, while ARM stands for advanced RISC machines. The ARM technology runs using a limited instruction set smaller processors can handle. On the other hand, larger computers use processors utilize processors designed to handle complex sets of instructions.

The ARM processor can complete many simple tasks at a higher frequency with less energy. This is because of the reduction of complexity of instructions that the processor needs to handle.

As a result, it can increase the efficiency of the processor as it eliminates the unnecessary instructions and parts, such as transistors, to allow the creation of a simple circuit.

The future of system-on-a-chip

The evolution and expansion of SoC technology with the proliferation and popularity of smartphones and other mobile devices are not limited only to consumer electronics. SoC is applicable in fields of specialty, such as the medical industry.

In fact, there is speculation that SoCs can be useful in implants for the deaf and blind, as it gives them the ability to hear and see. In addition, it can be applicable to microscopic robots that can prevent the entry of harmful diseases into the human body. That said, this can be just the beginning of a potentially revolutionary technology.

Conclusion

Although the system-on-a-chip is small and simple in comparison to the hardware and software found in most modern laptops and PCs, it is equally complex and intricate. But consumers can care less about its intricacy, knowing about its contribution to the development of modern technology.

The future of SoC technology is promising, aiming to make the life of smartphone users more convenient and productive. Perhaps it is about time consumers learn to appreciate how SoC technology can pave the way for the future.

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beingTime of Flight is the measurement of travel time by an object, electromagnetic, or acoustic wave through a medium. From radiation detectors to automotive, the Time of Flight ASIC has come a long way.

Time of Flight ASIC in the Medical Field

The medical field has reaped the benefits of TOF techniques; medical PET or Positron Emission Tomography for medical imaging, using time of light to improve background ratio and spatial resolution.

Time of Flight measurement in PET scanners provide accurate image reconstruction at a lower radiation dose and eliminates the risk of diagnostic error.

Time of Flight ASIC in Modern Day

Today, the use of the Time of Flight technique in Positron Emission Tomography (PET) is improving diagnostic and therapy assessment processes for patients in different medical fields.

Over the years several studies have been conducted on the use of Time of Flight ASIC technique and the development of high-resolution PET detectors with high accuracy and timing capabilities. Various ASIC designers and manufacturers have incorporated this method to improve imaging results.

Risk of missed diagnoses and cancer detections are lowering. This is also reducing the required time for data acquisition and the doses of radiation employed. Lower radiation dose equals lower cost.

The advancement of technology and recent ASIC designs allow higher accuracy while streamlining processes at lower costs. Designers and manufacturers have developed the design and production of a range of ASIC solutions used in clinical and medical evaluation.

Bettering performance in this area causes lower radiation doses being exposed to patients, and lowers costs.

Where do I find Time of Flight ASICs?

If you need ASICS, Linear Microsystems develops and manufactures high performance ASICs for your unique applications. The company’s over 20 years of experience gives them the knowledge and design expertise to come up with an advanced design automation toolset, packaging options, advanced processes, and the capability to conduct production testing while maintaining a high level of quality.

With the advanced tools, design system, and expertise, Linear Microsystem produces full SOC and mixed-signal ASICs.

Linear Microsystem is your one stop shop for all your ASIC needs. With a strong design team and the right experience levels, no design is too complex.

In-depth knowledge on various technologies and applications, tells you you will receive the perfect solution at a fair cost. Besides, you can get a free quote at any time by clicking here.

With the option to participate in the design, you get real time updates on how the project is progressing.

Linear Microsystem offers full service – where we perform all development activities from order, tests, and delivery.

Linear MicroSystems, Inc. is proud to offer its services worldwide as well as the surrounding areas and cities around our Headquarters in Irvine, CA: Mission Viejo, Laguna Niguel, Huntington Beach, Santa Ana, Fountain Valley, Anaheim, Orange County, Fullerton, and Los Angeles.

ASIC technology allows for the integration of required functionality to pave way for next generation designs. It also allows full customization of the design according to usage and specification. Besides that, Application Specific Integrated Circuits are lower power, high reliability, and difficult to copy.

ASICs are designed to carry out a specific task for a specific application. Since its development, many industries now depend on ASICs.

Common ASIC Industrial Applications

• Manufacturing and process automation
• Human/machine interface
• Sensor interface
• Home automation
• Building automation
• POS and Terminals like touchscreen, barcode scanners, and magstripe
• Power monitors
• Gas sensors
• Power sensors
• Precision timers
• Ultrasonic sensor drivers
• LED drivers
• Vibration and motor sensors
• Movement sensors
• Speed and position sensors
• Chemical sensors
• Tags and RFIDs
• GaN and laser drivers
• And so much more

https://linearmicrosystems.com/ develops and manufactures ASICS for various industrial applications. And with over 20 years of experience in the business, the team offers provides solutions to all your ASIC needs.

Reasons why use an ASIC

• Autonomy with lower internal components, less or lower power consumption, and better power management control.
• Your device is fully protected from cyber-attacks that will compromise safety and data security. With an ASIC designed specifically for your application, the solution is also designed with firmware and security boot, authentication, and attack protection.
• Using ASIC means optimization of performance according to your specifications. Besides, it is designed for specific regulatory compliance. https://linearmicrosystems.com/ adds functionalities that meet your ASIC needs.
• ASIC reduces product weight and size.

For all your ASIC application needs, https://linearmicrosystems.com/ offers a multitude of ASIC designs and applications:

• Communications like transceivers, telecommunications, WIFI, optical
• Video such as laser drivers and laser micro projection
• Audio like amplifiers and signal processing
• Automotive such as linear position sensors and hall rotary sensor
• Sensors include touchscreen processing, temperature, infrared, moisture, pressure, magnetic, and inductive proximity
• MEMS include drivers and controllers
• Power Management for power supply, low power, high voltage, and more
• Medical ASICS design and application include ultrasound, pain management, and glucose monitoring
• Display designs include LED, LCD, and OLED
• Signal Processing and Control include digital and analog filters, synchronous detection, frequency synthesis, and more
• Military design and application like Mems Avionics and 1553 bus transceiver and protocol,
• Industrial Control
• Motor
• ATE ASICS for power management, data acquisition, and PIN driver.

For all your simple to complex ASIC needs, https://linearmicrosystems.com/ will make the task easier for you. You can submit your ASIC specifications and we will give you a quotation at no cost.

After clicking here, whether you will perform the design or participate in the design process, Linear will make it possible for your business.

Linear MicroSystems, Inc. is proud to offer its services worldwide as well as the surrounding areas and cities around our Headquarters in Irvine, CA: Mission Viejo, Laguna Niguel, Huntington Beach, Santa Ana, Fountain Valley, Anaheim, Orange County, Fullerton, and Los Angeles.

Technological experts nowadays are relying more on integration, particularly in the field of microprocessors. However, there are challenges faced by engineers as it becomes harder to integrate system on a chip or SOC with the increasing amount of IP.

SOC integration has now been challenged with increased complexity such as multiple processors, power domains, and I/O. Here are several challenges that experts consider to be affecting technological advancement in different levels.

Problem with Complexity

Generally, people are not getting what they have expected. Expectations let them think that it is going to do something, but it does something else.

Another thing is complexity. Considerably, IP blocks are complicated, as well as the designs with such a short timeframe.

Timeframes Getting Too Short

Since integrators are under time pressure, it becomes quite challenging for integrators to do everything they can to achieve the highest quality in short period of time they have. At 15,000 CPUs running 24/7 for the verification process, it is a tough challenge.

Compatibility and Quality

Quality has a subjective and objective component. As far as the subjective component is concerned, nobody tends to get it right because it entirely depends on the user. On the objective component, however, it is what IP vendors are working to get right.

During the development of the system on a chip, sometimes the IP is being developed by other sources. Consequently, there will be more unknowns, while the other piece of verification is viewed at the IP level.

When it comes to verification in terms of use cases, there will probably be a million of them. Therefore, integrating the IP of company A and company B will be confusing since there is no assurance if that stuff works together.

Moreover, it will be difficult to ensure that the specs are interpreted in the same way.

Challenges of Sharing System On a Chip Memory

The same issue about SOC designs in 1958 was addressed in recent years. This was the need for larger memories to cater to increasingly powerful SOC designs. But sharing memory presented several challenges.

• Shared memory physical interconnection
• Concurrent multiprocessor shared memory access
• Service-level guarantees
• System performance

Consequently, a design methodology has been developed to utilize the elements that will be able to address such challenges.

• Open-core protocol
• Sonics Graphical SOC design, test, and modeling tools
• MemMax memory access scheduler
• SiliconBackplane MicroNetwork

Such elements will provide designers with essential architectural features and shared memory operational visibility to achieve optimized system performance. The main architectural methodology has adopted the Local Area Network concepts that offer high-performance communication between heterogeneous entities using a translucent shared transport mechanism.

Conclusion

Solving the challenges of SOC shared memory might not be enough to cater to the needs of integrating microprocessors and memory on a system on a chip. Basically, it is just a design methodology that employs atomic split-transaction operations to support multiprocessing and exploit multi-threaded MicroNetwork interconnections and opportunistic external memory access optimizations.

Therefore, solving the shared memory challenges of SOC is just an outcome of methodology philosophy. Perhaps technological experts of today can take advantage of this opportunity that was used to solve the interconnections problem in 1958, using the SOC designs of today.

Still interested in learning about system on a chip? Click here and head on over to our case study that features all things SOC.

Linear MicroSystems, Inc. is proud to offer its services worldwide as well as the surrounding areas and cities around our Headquarters in Irvine, CA: Mission Viejo, Laguna Niguel, Huntington Beach, Santa Ana, Fountain Valley, Anaheim, Orange County, Fullerton, and Los Angeles.